[2025-09-21T08:33:10Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: 28BA4E50, PC: 0040002A
[2025-09-21T08:33:10Z INFO  single] No replay file found
[2025-09-21T08:33:10Z INFO  single] Starting
[2025-09-21T08:33:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 683298384, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:10Z INFO  single] Event: NextCode
[2025-09-21T08:33:10Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Dark Castle'
[2025-09-21T08:33:10Z INFO  snow_core::emulator] Running
[2025-09-21T08:33:10Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T08:33:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 683298384, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:10Z INFO  single] Event: NextCode
[2025-09-21T08:33:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 683298384, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:10Z INFO  single] Event: NextCode
[2025-09-21T08:33:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [103197, 4294967295, 3067833782, 3681400539, 1840700269, 0, 0, 0], a: [6402956, 6422528, 4196198, 6291456, 4, 4196088, 4194544], usp: 0, isp: 683298384, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194936, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 11524914, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:10Z INFO  single] Event: NextCode
[2025-09-21T08:33:10Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T08:33:10Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T08:33:10Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 004034AE CE
[2025-09-21T08:33:10Z INFO  snow_core::mac::pluskbd] Keyboard reset
[2025-09-21T08:33:10Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00401690 CF
[2025-09-21T08:33:10Z INFO  snow_core::mac::pluskbd] Keyboard reset
[2025-09-21T08:33:11Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 13, 5, 59107, 0, 1, 76], a: [14672383, 14679551, 15720958, 15727614, 4200556, 15728638, 10485758], usp: 0, isp: 64344, sr: RegisterSR { 0: 8988, sr: 8988, ccr: 28, c: false, v: false, z: true, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202428, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 20614756, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:11Z INFO  single] Event: NextCode
[2025-09-21T08:33:11Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 12, 5, 0, 3, 0, 0], a: [14672383, 14679551, 15720958, 15727614, 4200556, 15728638, 10485758], usp: 0, isp: 64344, sr: RegisterSR { 0: 8984, sr: 8984, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202420, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 27662198, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:11Z INFO  single] Event: NextCode
[2025-09-21T08:33:12Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 65531, 4294901761, 65535, 1476395061, 0, 1, 4196512], a: [64458, 4212200, 4209080, 0, 4196532, 4195672, 4196338], usp: 0, isp: 64426, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 35098310, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:12Z INFO  single] Event: NextCode
[2025-09-21T08:33:12Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 2, 0, 1, 1476395061, 0, 2, 4196512], a: [64446, 4212200, 4199354, 280, 4196532, 4195672, 64496], usp: 0, isp: 64346, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 43162068, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 64, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:12Z INFO  single] Event: NextCode
[2025-09-21T08:33:13Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 2, 31, 1179602516, 1476395011, 2, 2, 4259839], a: [64432, 4212140, 4199354, 28, 2968, 4195672, 64482], usp: 0, isp: 64308, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 51226244, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 75, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:13Z INFO  single] Event: NextCode
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:13Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:13Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 3990, 7, 0, 1476395061, 2964, 1, 4259839], a: [64458, 4212200, 4199010, 0, 4196532, 4195672, 4196338], usp: 0, isp: 64426, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 58829886, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:13Z INFO  single] Event: NextCode
[2025-09-21T08:33:14Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 0, 4294967295, 512, 2964, 512, 4259839], a: [64458, 4212140, 4199354, 0, 4196532, 4195672, 4196338], usp: 0, isp: 64426, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 66775188, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 63, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:14Z INFO  single] Event: NextCode
[2025-09-21T08:33:14Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 3990, 12, 4294967295, 512, 2964, 512, 4259839], a: [64392, 4212200, 4210436, 0, 4196532, 4195672, 64442], usp: 0, isp: 64308, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 75425172, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 49, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:14Z INFO  single] Event: NextCode
[2025-09-21T08:33:15Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 2, 256, 1229867348, 6, 3, 2, 4259839], a: [64444, 4212200, 7358, 4294951914, 2968, 4195672, 64494], usp: 0, isp: 64316, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 83225618, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 22, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:15Z INFO  single] Event: NextCode
[2025-09-21T08:33:15Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [711, 2, 456, 1229849287, 1, 1992, 512, 258], a: [932, 3958, 5168, 4294951914, 2968, 5280, 4211916], usp: 0, isp: 64268, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4212136, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 89845220, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 68, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:15Z INFO  single] Event: NextCode
[2025-09-21T08:33:16Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 196609, 0, 1, 512, 2964, 31, 2940], a: [260990, 4212200, 4211600, 0, 4196532, 261520, 261112], usp: 0, isp: 260684, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 94695476, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 25, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:16Z INFO  single] Event: NextCode
[2025-09-21T08:33:16Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1490, 3, 43, 0, 65535, 0, 74, 3], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501270, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202730, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 102276518, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:16Z INFO  single] Event: NextCode
[2025-09-21T08:33:17Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1494, 3, 44, 0, 65535, 255, 74, 118], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202734, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 109163518, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 5, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:17Z INFO  single] Event: NextCode
[2025-09-21T08:33:17Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 91, 45, 238, 33423361, 214, 234, 55], a: [79414, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203010, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 114156686, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 8, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:17Z INFO  single] Event: NextCode
[2025-09-21T08:33:18Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 65, 64, 251, 4294836317, 59, 241, 50], a: [93148, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8976, sr: 8976, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203082, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 119205196, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 10, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:18Z INFO  single] Event: NextCode
[2025-09-21T08:33:18Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 142, 255, 0, 4294836728, 68, 72, 49], a: [111172, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501180, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203028, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 124217728, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 13, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:18Z INFO  single] Event: NextCode
[2025-09-21T08:33:19Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 9, 43, 4294901824, 43, 67305536, 0, 2], a: [501440, 3958, 5168, 4294842898, 52280, 501464, 501490], usp: 0, isp: 501216, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4213216, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 129289460, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 15, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:19Z INFO  single] Event: NextCode
[2025-09-21T08:33:19Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1056, 3, 44, 0, 4, 0, 74, 16], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501144, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202730, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 138334678, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 16, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:19Z INFO  single] Event: NextCode
[2025-09-21T08:33:20Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1410, 3, 42, 0, 65535, 255, 74, 16], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202734, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 145061448, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 16, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:20Z INFO  single] Event: NextCode
[2025-09-21T08:33:20Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1146, 3, 44, 0, 2, 221, 74, 18], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501144, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202726, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 153281190, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 18, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:20Z INFO  single] Event: NextCode
[2025-09-21T08:33:21Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 66040, 4294967295, 2318, 2964, 32, 0], a: [501440, 4212140, 7358, 4294842918, 52280, 501464, 501490], usp: 0, isp: 501312, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208914, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 161682812, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 19, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:21Z INFO  single] Event: NextCode
[2025-09-21T08:33:21Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 76, 110, 235, 4294836374, 110, 178, 243], a: [5640, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501144, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203054, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 169779916, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 19, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:21Z INFO  single] Event: NextCode
[2025-09-21T08:33:22Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 2, 193, 185, 4294836317, 213, 184, 3], a: [5699, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8976, sr: 8976, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203090, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 177703780, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 20, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:22Z INFO  single] Event: NextCode
[2025-09-21T08:33:22Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1441, 3, 43, 0, 65535, 237, 74, 22], a: [4202609, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202748, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 185638906, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 22, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:22Z INFO  single] Event: NextCode
[2025-09-21T08:33:23Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 65776, 4294967295, 2318, 2964, 32, 0], a: [501440, 4212140, 7358, 4294842918, 52280, 501464, 501490], usp: 0, isp: 501312, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 193568806, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:23Z INFO  single] Event: NextCode
[2025-09-21T08:33:23Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 65776, 4294967295, 2318, 2964, 32, 0], a: [501440, 4212140, 7358, 4294842918, 52280, 501464, 501490], usp: 0, isp: 501312, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 200640262, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 12, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:23Z INFO  single] Event: NextCode
[2025-09-21T08:33:24Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1395, 3, 42, 0, 65535, 222, 74, 94], a: [4202609, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501234, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202724, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 208588696, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 23, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:24Z INFO  single] Event: NextCode
[2025-09-21T08:33:24Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 0, 5, 0, 3, 49, 57], a: [14672383, 14679551, 15720958, 15727614, 4201258, 15728638, 10485758], usp: 0, isp: 501172, sr: RegisterSR { 0: 8984, sr: 8984, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202424, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 217521358, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:24Z INFO  single] Event: NextCode
[2025-09-21T08:33:25Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 196682, 4294967295, 2318, 2964, 32, 0], a: [501440, 4212200, 7358, 4294842918, 52280, 501464, 501490], usp: 0, isp: 501308, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 224048636, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 23, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:25Z INFO  single] Event: NextCode
[2025-09-21T08:33:25Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 32, 196682, 4294967295, 2318, 2964, 32, 0], a: [501440, 4212200, 7358, 4294842918, 52280, 501464, 501490], usp: 0, isp: 501308, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4208910, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 233121006, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 23, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:25Z INFO  single] Event: NextCode
[2025-09-21T08:33:26Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [282064, 4294967072, 126902, 1346978644, 9, 15, 124544, 217770], a: [2562, 52292, 125408, 124406, 52280, 501464, 501490], usp: 0, isp: 501352, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4251012, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 240806506, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 25, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:26Z INFO  single] Event: NextCode
[2025-09-21T08:33:26Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 227, 0, 171, 4294836488, 201, 229, 140], a: [136398, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203090, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 249233748, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 26, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:26Z INFO  single] Event: NextCode
[2025-09-21T08:33:27Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 66, 5, 155, 4294836392, 70, 47, 73], a: [156978, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203090, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 256476276, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 29, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:27Z INFO  single] Event: NextCode
[2025-09-21T08:33:27Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 13, 5, 74678, 0, 16, 32], a: [14672383, 14679551, 15720958, 15727614, 4201148, 15728638, 10485758], usp: 0, isp: 501176, sr: RegisterSR { 0: 8984, sr: 8984, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202404, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 262591286, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 32, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:27Z INFO  single] Event: NextCode
[2025-09-21T08:33:28Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1380, 3, 43, 0, 65535, 222, 74, 74], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501238, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202726, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 270876760, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 34, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:28Z INFO  single] Event: NextCode
[2025-09-21T08:33:28Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 163, 70, 180, 4294836233, 232, 98, 180], a: [196842, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501180, sr: RegisterSR { 0: 8969, sr: 8969, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203068, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 278591488, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 35, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:28Z INFO  single] Event: NextCode
[2025-09-21T08:33:29Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1346, 3, 43, 0, 10, 186, 74, 39], a: [4202608, 3244, 4202608, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501180, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202746, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 286616458, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 39, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:29Z INFO  single] Event: NextCode
[2025-09-21T08:33:29Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 186, 154, 222, 4294836620, 138, 221, 61], a: [5394, 776, 4202851, 4203190, 14678527, 15728638, 10485758], usp: 0, isp: 501144, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4203026, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 292169406, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 41, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:29Z INFO  single] Event: NextCode
[2025-09-21T08:33:30Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 5, 5, 0, 3, 32, 65], a: [14672383, 14679551, 15720958, 15727614, 52280, 15728638, 10485758], usp: 0, isp: 501168, sr: RegisterSR { 0: 8984, sr: 8984, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4202404, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 300261506, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 65, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:30Z INFO  single] Event: NextCode
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000001
[2025-09-21T08:33:30Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000001 PC = 004060E2
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:30Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294964565, 65534, 2, 3670015, 0, 62805, 52], a: [465424, 4224564, 465092, 465144, 465386, 513662, 465004], usp: 0, isp: 464864, sr: RegisterSR { 0: 8216, sr: 8216, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224228, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 306508350, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:30Z INFO  single] Event: NextCode
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FE0006
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FE0007
[2025-09-21T08:33:30Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address E1FE0007
[2025-09-21T08:33:30Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = E1FE0007 PC = 004068CE
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:30Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 0000DBC7
[2025-09-21T08:33:31Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 0000DBC7 PC = 00405530
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 1, 7479297, 8302, 110, 65535, 110], a: [0, 2444, 10890, 465490, 465720, 465724, 465506], usp: 0, isp: 465414, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240520, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 310863524, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:31Z INFO  single] Event: NextCode
[2025-09-21T08:33:31Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:31Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 006DFF5F
[2025-09-21T08:33:31Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 006DFF5F PC = 00405504
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:31Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 460799, 0, 64512, 65535, 4095, 4294967295, 52], a: [4216632, 512592, 464944, 465182, 465722, 465384, 465306], usp: 0, isp: 464940, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4216634, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 315063984, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:31Z INFO  single] Event: NextCode
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:31Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:32Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:32Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [125830016, 0, 65535, 3145728, 1283784703, 4095, 65472, 0], a: [4215650, 2180, 11274, 11288, 7208967, 465726, 465384], usp: 0, isp: 465380, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4197064, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 319737898, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:32Z INFO  single] Event: NextCode
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:32Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:32Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 13, 1179602516, 365953134, 11, 32, 110], a: [465406, 2444, 128186, 128144, 52280, 465724, 465392], usp: 0, isp: 465294, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4250824, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 323442144, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:32Z INFO  single] Event: NextCode
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:32Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:33Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:33Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 4294937296, 4294937296, 30000, 30000, 4095, 65472, 0], a: [465394, 465004, 4196638, 465578, 465312, 465386, 464974], usp: 0, isp: 464954, sr: RegisterSR { 0: 8200, sr: 8200, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4223462, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 328050200, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:33Z INFO  single] Event: NextCode
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00DF0F42 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00DF0F43 01
[2025-09-21T08:33:33Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 4CDF0F43
[2025-09-21T08:33:33Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 4CDF0F43 PC = 004068EA
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60000
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60001
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60002
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60003
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFE8
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFE9
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFEA
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFEB
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFEC
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFED
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFEE
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFEF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60000
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60001
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60002
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60003
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60000
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60001
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60002
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60003
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:33Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [125830016, 0, 65535, 3276800, 741081088, 745144384, 162725887, 4294967295], a: [4215650, 2180, 11274, 11288, 4294967295, 464432, 464090], usp: 0, isp: 465834, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4197056, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 331429678, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:33Z INFO  single] Event: NextCode
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0092
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0093
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0094
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0095
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0096
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0097
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0098
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC0099
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC009A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FC009B
[2025-09-21T08:33:33Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:33Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:33Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:34Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16, 24, 80, 3276923, 2123104256, 262157, 162660352, 4294901763], a: [4199836, 15720958, 136, 62, 536884762, 512586, 465758], usp: 0, isp: 465468, sr: RegisterSR { 0: 8980, sr: 8980, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4199816, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 335680578, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:34Z INFO  single] Event: NextCode
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:34Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:34Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [92, 262154, 316, 6553914, 2884435712, 262157, 162660352, 4294967295], a: [536885686, 536885248, 536883182, 465384, 536883218, 465726, 465298], usp: 0, isp: 465054, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4219878, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 339295086, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:34Z INFO  single] Event: NextCode
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:34Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:35Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF58
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF59
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF5A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF5B
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60000
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60001
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60002
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60003
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD6
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD7
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD4
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD5
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF94
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF95
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF96
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF97
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF98
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF99
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9B
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9C
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9D
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9E
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA0
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA1
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA2
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA3
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA4
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA5
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA6
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA7
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA8
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA9
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAA
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAB
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAC
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAD
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAE
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB0
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB1
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB2
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB3
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB4
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB5
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB6
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB7
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB8
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB9
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBA
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBB
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBC
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBD
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBE
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC0
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC1
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC2
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC3
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC4
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC5
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC6
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC7
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC8
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC9
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCA
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCB
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCC
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCD
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCE
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD0
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD1
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD2
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD3
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:35Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 1048576, 1, 3145729, 3427532800, 745144384, 162660360, 4294967295], a: [2960, 2456, 11274, 465040, 465722, 465726, 465056], usp: 0, isp: 464988, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240138, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 343851230, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:35Z INFO  single] Event: NextCode
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:35Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 262160, 269, 6553848, 1637679096, 262146, 162660352, 4294901772], a: [536885686, 536885248, 136, 64, 536883526, 507296, 464842], usp: 0, isp: 464598, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4220024, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 346588114, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:35Z INFO  single] Event: NextCode
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:35Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:36Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [271, 262415, 276, 6553871, 3081568248, 262153, 162660352, 4294967295], a: [536885686, 536885248, 536883182, 465382, 536883254, 507136, 465296], usp: 0, isp: 465052, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4219886, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 349457170, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:36Z INFO  single] Event: NextCode
[2025-09-21T08:33:36Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:36Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:36Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:36Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 262158, 244, 6553603, 101511168, 262151, 162660352, 4294901773], a: [536885686, 536885248, 136, 62, 536883398, 507228, 465298], usp: 0, isp: 465054, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4219992, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 352551042, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:36Z INFO  single] Event: NextCode
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:36Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0092
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0093
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0094
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0095
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0096
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0097
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0098
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C0099
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C009A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 005C009B
[2025-09-21T08:33:37Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:37Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 262156, 212, 6553663, 2086465536, 262412, 162660352, 4294967295], a: [536885686, 536885248, 536883182, 464928, 2456, 465270, 464842], usp: 0, isp: 464622, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4220044, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 355426858, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:37Z INFO  single] Event: NextCode
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00004ED7
[2025-09-21T08:33:37Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00004ED7 PC = 004071E4
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:37Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 121, 1179602516, 65535, 745144346, 2, 4294901870], a: [465406, 2444, 15448, 15438, 2968, 465724, 465392], usp: 0, isp: 465294, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4250824, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 358425054, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:37Z INFO  single] Event: NextCode
[2025-09-21T08:33:37Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:37Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:37Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:38Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967295, 1048579, 1, 7471214, 4019088170, 745144384, 162660358, 4294967295], a: [465384, 465384, 10890, 10792, 2456, 465726, 465384], usp: 0, isp: 465362, sr: RegisterSR { 0: 8200, sr: 8200, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4198424, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 361520642, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:38Z INFO  single] Event: NextCode
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:38Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:38Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:38Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [554696876, 491520, 4227072, 32768, 195, 745145343, 4294967295, 48], a: [4228150, 512464, 465602, 465652, 465266, 464928, 465396], usp: 0, isp: 465340, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4229054, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 364543516, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:38Z INFO  single] Event: NextCode
[2025-09-21T08:33:39Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:39Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 59, 1179602516, 235732991, 745144329, 32, 4294901870], a: [465406, 2444, 129806, 128144, 52280, 465724, 465392], usp: 0, isp: 465294, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4250818, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 367526676, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:39Z INFO  single] Event: NextCode
[2025-09-21T08:33:39Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:39Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:39Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:39Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 968229887, 0, 65024, 0, 745145343, 4294967295, 32], a: [4216632, 512262, 464956, 465198, 465722, 465384, 465322], usp: 0, isp: 464952, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4216612, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 370507420, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:40Z INFO  single] Event: NextCode
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:40Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294967295, 10, 2, 2944139263, 745144320, 0, 24], a: [465422, 4224564, 465090, 465142, 465384, 506000, 465002], usp: 0, isp: 464862, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224592, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 373546322, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:40Z INFO  single] Event: NextCode
[2025-09-21T08:33:40Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:40Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD6
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD7
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD4
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD5
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF94
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF95
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF96
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF97
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF98
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF99
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9B
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9C
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9D
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9E
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFF9F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA0
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA1
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA2
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA3
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA4
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA5
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA6
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA7
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA8
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFA9
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAA
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAB
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAC
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAD
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAE
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFAF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB0
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB1
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB2
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB3
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB4
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB5
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB6
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB7
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB8
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFB9
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBA
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBB
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBC
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBD
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBE
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFBF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC0
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC1
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC2
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC3
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC4
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC5
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC6
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC7
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC8
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFC9
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCA
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCB
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCC
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCD
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCE
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFCF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD0
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD1
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD2
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00FEFFD3
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:40Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 64, 1179602516, 2178482175, 745144326, 2, 4294901870], a: [465406, 2444, 15608, 15438, 2968, 465724, 465392], usp: 0, isp: 465294, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4250826, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 376363988, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:41Z INFO  single] Event: NextCode
[2025-09-21T08:33:41Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 006E0009
[2025-09-21T08:33:41Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 006E0009 PC = 004071DC
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:41Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [786432, 8, 148, 7471107, 3944869888, 262152, 162660352, 4294901761], a: [536885686, 536885248, 136, 62, 536885010, 513296, 465300], usp: 0, isp: 465056, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4219992, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 379190218, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:41Z INFO  single] Event: NextCode
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:41Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:41Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [60074, 57344, 13, 64, 2183593983, 745152511, 4294959104, 20], a: [464994, 4224520, 464364, 464416, 464930, 513148, 464276], usp: 0, isp: 464136, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224552, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 381940880, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:42Z INFO  single] Event: NextCode
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:42Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [32, 458941, 1, 3276800, 1752656682, 745144384, 162660358, 4294967040], a: [465064, 4196638, 465310, 465576, 465310, 465724, 464976], usp: 0, isp: 464836, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4223822, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 384701994, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:42Z INFO  single] Event: NextCode
[2025-09-21T08:33:42Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:42Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF58
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF59
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF5A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF5B
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60000
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60001
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60002
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60003
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD6
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD7
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD4
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD5
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF94
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF95
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF96
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF97
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF98
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF99
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9B
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9C
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9D
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9E
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FF9F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA0
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA1
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA2
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA3
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA4
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA5
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA6
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA7
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA8
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFA9
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAA
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAB
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAC
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAD
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAE
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFAF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB0
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB1
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB2
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB3
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB4
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB5
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB6
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB7
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB8
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFB9
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBA
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBB
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBC
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBD
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBE
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFBF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC0
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC1
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC2
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC3
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC4
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC5
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC6
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC7
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC8
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFC9
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCA
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCB
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCC
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCD
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCE
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFCF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD0
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD1
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD2
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B5FFD3
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:42Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [91, 0, 1, 7471143, 3345219694, 745144430, 65535, 4294901870], a: [4199836, 15720958, 10890, 465490, 465720, 465724, 465506], usp: 0, isp: 465358, sr: RegisterSR { 0: 8464, sr: 8464, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4199854, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 387541226, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:43Z INFO  single] Event: NextCode
[2025-09-21T08:33:43Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:43Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:43Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16647170, 4294901760, 1, 2, 1829912575, 745193472, 458754, 0], a: [464506, 4224394, 464506, 464558, 11014, 506824, 464418], usp: 0, isp: 464278, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224408, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 390238340, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:43Z INFO  single] Event: NextCode
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:43Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:43Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 2097152, 1, 2, 439577386, 745144384, 458754, 0], a: [464050, 4196638, 464050, 464102, 2574, 464930, 463962], usp: 0, isp: 463822, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224032, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 393116796, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:44Z INFO  single] Event: NextCode
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:44Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901786, 3276990, 480, 458819, 179306976, 745144384, 12452320, 4391392], a: [4224848, 4196638, 4196638, 465170, 465172, 465724, 465018], usp: 0, isp: 464760, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4224848, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 395863724, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:44Z INFO  single] Event: NextCode
[2025-09-21T08:33:44Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:44Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60012
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60013
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60014
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60015
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60016
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60017
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60018
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B60019
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B6001A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Read from unimplemented address: 00B6001B
[2025-09-21T08:33:45Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:45Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 13, 1179602516, 3583639551, 745144327, 2, 4294901870], a: [465406, 2444, 15600, 15438, 2968, 465724, 465392], usp: 0, isp: 465294, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4250824, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 398720608, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:45Z INFO  single] Event: NextCode
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:45Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [108625920, 3, 65, 3145759, 2695856128, 262149, 162660352, 4294901765], a: [536885686, 536885248, 136, 62, 536884466, 512456, 465304], usp: 0, isp: 465060, sr: RegisterSR { 0: 8216, sr: 8216, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4220010, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 401426112, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:45Z INFO  single] Event: NextCode
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:45Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:45Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [3072, 262161, 291, 6553603, 935124992, 262149, 162660352, 4294901771], a: [536885686, 536885248, 136, 62, 536883672, 507364, 464842], usp: 0, isp: 464598, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4220004, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 404163372, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:46Z INFO  single] Event: NextCode
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 00000067
[2025-09-21T08:33:46Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 00000067 PC = 00407D36
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z WARN  snow_core::cpu_m68k::bus] Unaligned access: address 006DFF5F
[2025-09-21T08:33:46Z DEBUG snow_core::cpu_m68k::cpu] Address error: read = true, address = 006DFF5F PC = 00405504
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [12, 557056, 4128768, 32768, 135, 745145343, 4294967295, 4], a: [464698, 464690, 464672, 464764, 465288, 464950, 464508], usp: 0, isp: 464452, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4229146, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 407001224, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Dark Castle", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: false, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: Early512K, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:33:46Z INFO  single] Event: NextCode
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 56
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 02
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091E 00
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 0040091F 0A
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400920 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400921 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400922 80
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400923 01
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400924 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400925 FF
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400926 7F
[2025-09-21T08:33:46Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00400927 FF
[2025-09-21T08:33:48Z INFO  single] deduplicated 120 frames to 102